Mold Array Process (MAP) is widely implemented in conventional semiconductor packaging technology which can provide lower cost in mass production. A substrate strip comprising a plurality of substrate units arranged in an array serves as chip carriers for a plurality of chips. After semiconductor packaging processes such as die attaching, wire bonding, etc, a molding compound larger than the substrate array is disposed to continuously encapsulate the substrate units and the scribe lines between adjacent substrate units. Then the substrate matrix is singulated along the scribe lines to obtain a plurality of individual semiconductor packages with the cut edges of substrate units exposed.
A window type BGA semiconductor package manufactured by an conventional MAP method for is shown in FIG. 1 and a substrate strip used in the MAP method is shown in FIG. 2. As shown in FIG. 1, a conventional semiconductor package 100 primarily comprises a substrate unit 113, a chip 120, and an encapsulant 130 where the chip 120 is disposed on the top surface 111 of the substrate unit 113. The substrate unit 113 further has a central slot 117 penetrating from the top surface 111 to the bottom surface 112. A plurality of electrodes 122 disposed on the active surface 121 of the chip 120 are aligned to and exposed from the central slot 117. The electrodes 122 of the chip 120 are electrically connected to the substrate unit 113 by a plurality of bonding wires 150 passing through the central slot 117. The encapsulant 130 is disposed on the top surface 111 as well as inside the central slot 117 of the substrate unit 113 to encapsulate the chip 120 and the bonding wires 150. A plurality of solder balls 160 are disposed on the bottom surface 112 of the substrate unit 113 as the external terminals of the semiconductor package 100. However, with the existing MAP technology, the encapsulant 130 can not fully encapsulate the cut edges 116 of the substrate unit 113 from which the core layers and metal traces of the substrate unit 113 are exposed so that moisture would easily diffuse into the semiconductor package 100 leading to reliability issues.
As shown in FIG. 2, a plurality of substrate units 113 are arranged in an array of a conventional substrate strip 110 for being encapsulated by a conventional MAP method. A plurality of scribe lines 114 crisscrossing to each other are defined between adjacent substrate units 113. After die attaching and wire bonding, the substrate units 113 and the scribe lines 114 are encapsulated by the afore encapsulant 130 as shown in FIG. 1 again. The encapsulant 130 is formed by molding, but the portion of the encapsulant 130 above the scribe lines 114 must be removed in the following processes such as singulation to form individual semiconductor packages 100. Therefore, the portion of the encapsulant 130 disposed over the scribe lines 114 would not exist in the final semiconductor packages 100. When the substrate units 113 are singulated along the scribe lines 114, the blade of singulation cuts through the encapsulant 130 and the substrate strip 110 to expose a plurality of cut edges 116 of the substrate units 113 from the cut surfaces of the encapsulant 130, i.e., the cut edges 116 of the substrate units 113 can not be protected by the encapsulant 130. Therefore, after singulation, the plated traces and the core layer are exposed from the cut edges 116 of the substrate units 113 leading to poor moisture resistance and vulnerable for external disturbance. Moreover, the peripheral circuits on the substrate units 113 can easily be damaged by cutting tool during singulation processes leading to electrical short or open issues.